Field of the Invention
The present invention relates to electronic circuitry, and more particularly, to a circuit for inhibiting a phase-locked loop from locking on any lobe of an input signal other than the main lobe.
Description of the Prior Art
A phase-locked loop is basically a servo system in which a voltage controlled oscillator (VCO), having a center frequency determined by an external timing capacitor and resistor, produces an output signal which is compared with an incoming information signal. An error correction voltage is produced, the magnitude of which is a function of the phase and frequency differences between the compared signals. After processing, the error correction signal is fed back to the VCO to complete the loop and cause the VCO frequency to approach the frequency of the input signal. The VCO initially assumes a "capture" state in which it traverses the frequency range of the loop under the influence of a sweep generator, continually testing the input signal and having its own frequency adjusted accordingly. As it approaches the input signal frequency, the VCO frequency continues to change until it is within a small bandwidth of the signal frequency. Thereafter, the VCO stops sweeping and its output matches the input frequency, thereby permitting extraction of the information contained in the input signal at a very favorable noise level.
For many input signals such as phase shift key, there is an undesired carrier offset due to factors such as Doppler shifts and oscillator instability. Under such conditions it is necessary to sweep the frequency of the VCO to search out and lock on the incoming signal. Should the carrier offset be so great that the main signal lobe is outside the VCO sweep range, the loop will generally lock onto one of the side or harmonic lobes within its range. Since the amplitudes of adjacent side lobes do not differ from each other by a great amount, the loop will often lock onto the first lobe it comes across which has a sufficient signal to noise ratio. When this condition occurs, which may be denominated a false lock because the main signal lobe has not been detected, sweeping is discontinued and the loop tracks the side lobe. Even when the main lobe is within the sweep frequency range, it is still possible for the loop to lock on a side lobe if the sweep rate is not very high and the side lobe is not very noisy. The problem is especially acute during short periodic modulation sequences, such as an alternating one-zero pattern commonly used for initial lockup.
Accordingly, there is a need for a phase-locked loop which is capable of discriminating between the main and side lobes of an input signal.